多次热氧化削减硅通孔内壁扇贝纹

人工晶体学报 ›› 2021, Vol. 50 ›› Issue (6): 1131-1137.

多次热氧化削减硅通孔内壁扇贝纹

王硕¹, 杨发顺^1,2,3, 马奎^1,2,3

1.贵州大学大数据与信息工程学院,贵阳 550025;
2.贵州省微纳电子与软件技术重点实验室,贵阳 550025;
3.半导体功率器件可靠性教育部工程研究中心,贵阳 550025

收稿日期:2021-02-16 出版日期:2021-06-15 发布日期:2021-07-08
通讯作者: 马奎,博士,副教授。E-mail:kma@gzu.edu.cn
作者简介:王硕(1997—),男,贵州省人,硕士研究生。E-mail:907053142@qq.com
基金资助:
国家自然科学基金(61664004)

Scallop Pattern Reduction of Through Silicon Via by Multiple Thermal Oxidation

WANG Shuo¹, YANG Fashun^1,2,3, MA Kui^1,2,3

1. College of Big Data and Information Engineering, Guizhou University, Guiyang 550025, China;
2. Key Laboratory of Micro-Nano-Electronics of Guizhou Province, Guiyang 550025, China;
3. Semiconductor Power Device Reliability Engineering Research Center of Ministry of Education, Guiyang 550025, China

Received:2021-02-16 Online:2021-06-15 Published:2021-07-08

摘要/Abstract

摘要： 硅通孔(TSV)在三维集成系统中扮演着非常重要的角色。BOSCH刻蚀技术是当前主流的硅通孔刻蚀方法,因为刻蚀和钝化交替进行,这种干法刻蚀工艺不可避免地会在硅通孔的内部形成扇贝纹,其尺度一般在几十纳米到几百纳米不等。扇贝纹会导致后续填充的各层材料以及它们之间的界面不平滑,从而严重影响TSV的性能以及三维集成系统的可靠性。高温热氧化时,较高氧气流量可确保硅通孔内部氧气浓度基本均匀,扇贝纹凸起处的二氧化硅生长速率相对较快。交替循环进行高温热氧化和腐蚀二氧化硅,可有效削减硅通孔内壁的扇贝纹。对深宽比为8∶1的硅通孔,经过四次高温热氧化(每次氧化的工艺条件为:1 150 ℃、湿氧氧化10 min)和四次腐蚀二氧化硅后,内壁的扇贝纹起伏最大值从最初的400 nm降到了90 nm。实验结果表明该方法削减扇贝纹的效果十分明显。

关键词: 扇贝纹, 硅通孔, BOSCH刻蚀技术, 高温热氧化, 三维集成

Abstract: Through silicon via (TSV) is a very important part of three-dimensional integrated systems. At present, BOSCH etching technology is usually used for etching of through silicon via. Because etching and passivation are carried out alternately, this dry etching process will inevitably form scallop pattern in the inner sidewall of through silicon via, and its scale is generally from ~10 nm to ~100 nm. Scallop pattern will lead to the unsmooth interface between layers inside through silicon via, which will seriously affect the performance of through silicon via and the reliability of three-dimensional integrated systems. During high temperature thermal oxidation, the higher oxygen flow rate can ensure that the oxygen concentration in the via is nearly uniform, and the growth rate of SiO₂ in the scallop ridge bulge is relatively faster. The scallop pattern on the inner wall of through silicon via can be effectively reduced by alternating high temperature oxidation and etching SiO₂. For through silicon via with a ratio of depth to width of 8∶1, after four times of high temperature thermal oxidation (the process conditions of each oxidation process are T=1 150 ℃, t=10 min, and the oxidizing environment is wet oxygen) and four times etching SiO₂, the maximum scallop ripple decreases from 400 nm to 90 nm. The experimental results show that the effect of this method is very obvious.

Key words: scallop pattern, through silicon via, BOSCH etching technology, high temperature thermal oxidation, three-dimensional integration

中图分类号:

TN305.2

王硕, 杨发顺, 马奎. 多次热氧化削减硅通孔内壁扇贝纹[J]. 人工晶体学报, 2021, 50(6): 1131-1137.

WANG Shuo, YANG Fashun, MA Kui. Scallop Pattern Reduction of Through Silicon Via by Multiple Thermal Oxidation[J]. JOURNAL OF SYNTHETIC CRYSTALS, 2021, 50(6): 1131-1137.

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