Abstract: Silicon carbide (SiC) is one of the superior materials used in the manufacture of electronic components designed to work at high temperatures, high frequencies and high-power. In the past two decades, the application of SiC materials has been expanding as a result of much improved production and processing techniques. Although most SiC chips are still mainly made from 6 inch (1 inch=25.4 mm) wafers, leading manufacturers have begun developing next-generation parts and chips based upon 8 inch SiC wafers. This study collaborates with leading enterprises in the upstream and downstream of the domestic silicon carbide industry chain in order to facilitate domestic production of 8 inch SiC chips, with the focus being wafer preparation and epitaxial growth. In this work, 8 inch conductive 4H-SiC substrate wafer was prepared by diameter expansion growth, with low average base plane dislocation (BPD) density (251 cm^-2) and virtually ‘zero threading screw dislocation (TSD)’ density (<1 cm^-2) that meet the production requirements. Based on these 8 inch substrates, we achieve fast epitaxial growth (68.66 μm/h) with domestically produced 8 inch epitaxy equipment and processing packages. The thickness uniformity of the resultant wafers is 0.89% and the doping uniformity is 2.05%. These parameters, as well as the defect density, are on par with those of high-quality 6-inch wafers, fully meeting production requirements. The 8 inch wafers prepared in this paper are better than those described in international publications in terms of thickness and doping uniformity. The defect density is only 1/4 of international data. In this paper, multi-wafer repetative text was designed and executed, to verify the stability of 8 inch epitaxy.

Key words: silicon carbide, 8 inch, wafer, epitaxy, defect density, doping uniformity