面向特高压大电流功率器件的8英寸200 μm 4H-SiC厚膜同质外延研究

doi:10.16553/j.cnki.issn1000-985x.2025.0197

摘要/Abstract

摘要： 本文针对特高压、大电流SiC功率器件应用背景下高质量4H-SiC厚膜同质外延生长中的关键技术挑战，系统研究了外延层掺杂浓度与厚度的均匀性控制、表面缺陷密度抑制及少数载流子寿命提升等问题。通过优化反应室结构设计与精确调控外延工艺，显著提高了外延层厚度与掺杂浓度的均匀性；研究进一步表明，严格控制p型外延层三角形缺陷数量与外延过程中的掉落物是降低厚膜表面缺陷密度、提升外延片可用面积的有效途径，同时也对提升少子寿命具有重要作用。最终，本研究成功制备了厚度达到200 μm、掺杂浓度控制在1.9×10¹⁴ cm^-3的高质量8英寸（1英寸=2.54 cm）4H-SiC同质外延厚膜，其厚度不均匀性为0.95%，掺杂浓度不均匀性为3.92%。在10 mm×10 mm芯片尺度下，IGBT结构外延片的可用面积达到46.5%，二极管/MOSFET结构外延片的可用面积高达96.9%，且少子寿命均超过5 μs。AFM测试显示外延层表面粗糙度较低，形貌优良。本研究展示了实现高均匀性、低缺陷密度、高少子寿命的SiC同质外延厚膜的有效技术方案，对推进SiC特高压器件（如IGBT）的制备及其在新型储能、智能电网等领域的产业化应用具有一定的科学意义与工程价值。

关键词: 碳化硅; 同质外延; 厚膜; 特高压功率器件; 表面缺陷; 少子寿命

Abstract: The epitaxial growth of 4H-SiC thick films was investigated to meet the requirements for ultra-high-voltage and high-current power devices. Key parameters，including the uniformity of the epitaxial layer's doping concentration and thickness，the suppression of surface defect density，and the enhancement of minority carrier lifetime were explored. The results demonstrate that the uniformity of the epitaxial layer's thickness and doping concentration can be significantly improved through optimized reactor design combined with precise process control. Furthermore，strict control of triangle defects of p-type epi-layer and downfalls during epitaxy is identified as a critical technique for reducing surface defect density and increasing the usable wafer area，which also contributes substantially to the improvement of minority carrier lifetime. High-quality 8 inch 4H-SiC homoepitaxial thick films were successfully fabricated，achieving a thickness of 200 μm with a doping concentration of 1.9×10¹⁴ cm^-3. The thickness non-uniformity is measured at 0.95%，and the doping concentration non-uniformity is 3.92%. A usable area of 46.5% is obtained for the IGBT structure （based on a 10 mm×10 mm die size），while the diode structure achieve a remarkably high usable area of 96.9%. Minority carrier lifetimes exceeding 5 μs are recorded for both structures. The epitaxial layers were characterized by AFM，which reveal low surface roughness and excellent morphology. This study presents an effective technical approach for producing SiC homoepitaxial thick films with high uniformity，low defect density，and extended minority carrier lifetime. The methodology is demonstrated to be of significant importance for the development of SiC ultra-high-voltage devices （such as IGBT） and their industrial applications in sectors such as novel energy storage systems and smart grids.

Key words: SiC; homoepitaxy; thick film; ultra-high-voltage power device; surface defect; minority carrier lifetime

中图分类号:

O484.1

蔡子东, 江奕天, 叶正, 伍子豪, 房育涛, 夏云, 陈刚, 胡浩林, 万玉喜. 面向特高压大电流功率器件的8英寸200 μm 4H-SiC厚膜同质外延研究[J]. 人工晶体学报, 2026, 55(2): 264-273.

CAI Zidong, JIANG Yitian, YE Zheng, WU Zihao, FANG Yutao, XIA Yun, CHEN Gang, HU Haolin, WAN Yuxi. Homoepitaxial Growth of 8-Inch 200 μm 4H-SiC Thick Film for Ultra-High Voltage and High-Current Power Devices[J]. Journal of Synthetic Crystals, 2026, 55(2): 264-273.

图/表 8

图1 同质外延结构示意图。（a）IGBT结构；（b）二极管/MOSFET结构

Fig.1 Schematic diagram of epi-structures. （a） IGBT structure；（b） diode/MOSFET structure

图2 厚膜外延层厚度测试结果。IGBT结构外延片的截面SEM照片（a）与SEM厚度量测数据（b）；IGBT结构外延片经傅里叶红外光谱测试与拟合后得到的总外延厚度（c）和n型掺杂外延层的厚度（d）

Fig.2 Characterization data of thick film epitaxial layer thickness. Cross-sectional SEM image （a） of IGBT structure and statistical data of thickness （b） measured by SEM；total epitaxial thickness （c） and thickness （d） of n-type doped epitaxial layer obtained after FT-IR testing and fitting of IGBT structure epitaxial wafer

图3 厚膜外延层的掺杂浓度测试数据。（a）单片外延片n型掺杂层的掺杂浓度，掺杂浓度均值为1.94×1014 cm-3，不均匀性为3.92%；（b）同一批次连续8片外延片的掺杂浓度

Fig.3 Doping concentration data of thick film epitaxial layer. （a） n-type doped layer on a single wafer，showing a mean value of 1.94×1014 cm-3 and a non-uniformity of 3.92%；（b） results for eight consecutive wafers from the same batch

图4 p型SiC外延层的Al掺杂SIMS测试结果

Fig.4 SIMS measurement results of Al doping in the p-type SiC epitaxial layer

图5 p型外延与厚膜外延的表面缺陷扫描数据。（a）优化前的p型外延层；（b）优化后的p型外延层；（c）基于优化前p型外延层生长的IGBT结构；（d）基于优化后p型外延层生长的IGBT结构；（e）二极管/MOSFET结构外延片

Fig.5 Surface defect of p-type epitaxial and thick film epitaxial layers. （a） p-type epitaxial layer before optimization；（b） p-type epitaxial layer after optimization；（c） IGBT structure grown on pre-optimized p-type epitaxial layer；（d） IGBT structure grown on optimized p-type epitaxial layer；（e） diode/MOSFET structure epitaxial wafer

图6 IGBT结构外延片中缺陷示意图，其中虚线框内为三角形缺陷放大图，实线框内为三角形缺陷衍生的BPD及其他缺陷

Fig.6 Schematic diagram of defects in IGBT epi-structure wafer，where dashed box shows an enlarged view of a triangular defect caused by downfall，and solid box displays BPD and other defects derived from the triangular defect

图7 厚膜外延少子寿命测试图。（a）IGBT结构外延片；（b）二极管/MOSFET结构外延片

Fig.7 Minority carrier lifetime measurements of thick film epitaxial layer. （a） IGBT epitaxial wafer；（b） diode/MOSFET epitaxial wafer

图8 厚膜外延片的AFM照片。IGBT结构外延片的中心位置（a）和边缘位置（b）；二极管/MOSFET结构外延片中心位置（c）和边缘位置（d）

Fig.8 AFM images of thick film epitaxial layer. Center region （a） and edge region （b） for IGBT epi-structure；center region （c） and edge region （d） for diode/MOSFET epi-structure

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